The present invention relates generally to integrated electronics circuit devices and more specifically to a neutralization device to reset or inhibit at least certain electronic functions in an integrated circuit, depending on the level of the supply voltage. Most integrated circuits have a neutralization device of this kind, especially those with electrically programmable non-volatile memories.
In an integrated circuit, a device of this kind carries out the resetting of certain electronic elements, especially the sequential circuits such as the flip-flop circuits, when the integrated circuit is powered on or powered off. It also provides for the inhibition of certain modes of operation of the integrated circuit, if the supply voltage is not greater than a specified threshold, to prevent unpredictable behavior. In the field of electrically erasable or programmable non-volatile memories, examples of these modes of operation include, in particular, the operations of writing in these memories.
It will be understood therefore that the neutralization device fulfils a function that is vital to the operating safety of the integrated circuit in its applications environment. This function requires a static detection structure, namely one that enables the detection of a voltage level and not just a relative voltage variation (dV/dt).
As is known, a neutralization device of this kind comprises a voltage reference circuit series-connected with a current biasing means. The connection point between the reference circuit and the biasing means gives a level detection signal applied to the input of an inverter stage that gives a neutralization signal referenced POR at output.
The voltage reference signal determines the switch-over threshold Vs of the neutralization device. As shown schematically in FIG. 1, when the power is turned on, the neutralization signal POR follows the level of the supply voltage Vdd up to the switch-over threshold Vs, beyond which the neutralization signal POR is drawn to zero volts.
The following relationships are therefore obtained: EQU if Vcc(t)&lt;Vs, POR=Vcc(t) EQU if Vcc(t)&gt;Vs, POR=0
The neutralization signal POR is applied to a circuitry for the resetting and disabling of the integrated circuit.
A neutralization device of this type is for example described in detail in the French patent application No. 96 01378 corresponding U.S. patent application Ser. No. 08/792,962. It works as soon as the power is turned on, to manage the power-on operation and the possible dropping and rising of the supply voltage in operational mode. This continuous operation leads to permanent current consumption, even when the electronic circuit is in standby mode (i.e., in a mode where, while the integrated circuit is powered, a circuit select signal CS for the selection of the integrated circuit is not activated).
While this permanent consumption is negligible as compared with that of the other electronic functions of the integrated circuit when it is activated, this consumption becomes the major component of the total consumption of the integrated circuit in standby mode.
As an order of magnitude, it may be said realistically this consumption amounts to about ten micro Amperes as compared with the figure of some milliamperes representing the total consumption of the integrated circuit when it is activated. This very substantial consumption in standby mode is becoming increasingly inconvenient because of the trend toward lowering the level of the supply voltage of the circuits. Accordingly, there is a need for a neutralization device in an integrated circuit that avoids the foregoing drawbacks.